1. Field of the Invention
The present invention relates to a video signal processing circuit, and more particularly to a burst gate pulse generating circuit for generating a burst gate pulse for extracting a burst signal from a sync separation output signal.
2. Description of the Related Art
Generally, a burst gate pulse generating circuit is used in a color television set, a video tape recorder, and the like. A sync separation signal is supplied to a burst gate pulse generating circuit which in turn generates a burst gate pulse. The burst gate pulse derived from the burst gate pulse generating circuit is used as a gate pulse for the burst signal detection in a color synchronizing circuit. The same is also used in an AGC (automatic gain control) circuit, as a key pulse for AGC detection. Specifically, in the AGC circuit, a potential of the video signal at the pedestal portion is extracted by using the burst gate pulse. This potential at the pedestal portion is compared with a reference potential. By using the comparison result, the gain of the AGC circuit is controlled so that the amplitude of the sync signal is kept constant. The burst gate pulse is used as a reference signal in the ACC (automatic color control) detection mode.
As just mentioned, the burst gate pulse is used as reference signals in the video circuits. Therefore, high exactness is required for the pulse width and the pulse position of the burst gate pulse. Actually, however, noise is frequently introduced into the sync separation signal. The introduced noise leads to improper operation of the burst gate pulse generating circuit, and consequently generation of a mistaken burst gate pulse.
An example of a conventional burst gate pulse generating circuit is illustrated in FIG. 1. In the figure, reference symbol IN indicates an input terminal for receiving a sync separation circuit; OUT an output terminal for outputting a burst gate pulse; Q1 to Q16, npn or pnp transistors; R1 to R13, resistors; C1 a capacitor; V1 and V2 constant voltage sources; I1 and I2 constant current sources; and A1 to A3, differential amplifiers. A value of the constant voltage source V2 is higher than that of the constant voltage source V1.
FIG. 2 shows a timing chart useful in explaining the operation of the bust gate pulse generating circuit shown in FIG. 1. In FIG. 2, a waveform A represents a variation of a sync separation signal applied to the input terminal IN; a waveform B, a voltage variation of a base signal of each of the transistors Q2, Q8 and Q15; a waveform C, a voltage variation of a base signal of each of the transistors Q4 and Q7 or a current variation of at the collector of each of the transistors Q5 and Q6; a waveform D, a voltage variation of a base signal of the transistor Q3; and a waveform E, a variation of a burst gate pulse derived from the output terminal OUT.
The operation of the above burst gate pulse generating circuit will be described in brief. When a sync signal rises to "1" level, charge to the capacitor C1 starts and it is charged by the power source voltage V.sub.CC via the resistor R3. With progression of the charging operation, a base voltage of the transistor Q3 rises at a given time constant as indicated by the waveform D in FIG. 2. The base voltage of the transistor Q3 exceeds a voltage V0 that is obtained by dividing the power source voltage V.sub.CC by the resistors R4, R7 and R6. At this time, the transistor Q3 is turned on, while the transistor Q4 is turned off. In turn, the transistors Q5, Q6 and Q7 are also turned off. The turning off of the transistor Q7 places the bases of the transistors Q2, Q8 and Q15 in a "1" level, as indicated by the waveform B.
When the base voltage of the transistor Q3 rises and exceeds the voltage of the constant voltage source V1, the transistor Q14 is turned on and a signal at the output terminal OUT rises to a level of "1". See the waveform E in FIG. 2. The base voltage of the transistor Q3 further rises and exceeds the value of the constant voltage source V2. The transistor Q9 is turned off, and the signal at the output terminal OUT drops again to "0", as indicated by the waveform E.
In this way, in the conventional burst gate pulse generating circuit, a pulse signal with a predetermined pulse width is generated in synchronism with the leading edge of the pulse contained in the sync separation signal.
Also in response to the noise contained in the sync separation signal, the burst gate pulse generating circuit operates to generate pulses in a similar way.